Miroslav Lichvar 6dad2c24bf hwclock: drop all samples on reset ... On some HW it seems it's possible to get an occasional bad reading of the PHC (with normal delay), or in a worse case the clock can step due to a HW/driver bug, which triggers reset of the HW clock instance. To avoid having a bad estimate of the frequency when the next (good) sample is accumulated, drop also the last sample which triggered the reset.		2017-08-23 15:01:30 +02:00
..
compilation	test: add scan-build compilation test	2016-12-08 14:47:38 +01:00
kernel	test: add tests for system adjtime() and ntp_adjtime()	2015-09-17 10:56:51 +02:00
simulation	ntp: limit number of interleaved responses in symmetric mode	2017-08-09 09:57:13 +02:00
unit	hwclock: drop all samples on reset	2017-08-23 15:01:30 +02:00